Unless otherwise indicated herein, the materials described herein are not prior art to the claims in the present application and are not admitted to be prior art by inclusion in this section.
Existing technologies may use internal bit error rate test (BERT) and pattern generator systems to monitor eye diagrams. The BERT and pattern generator systems may consume a large amount of power and integrated circuit (IC) space. The BERT and pattern generator systems may need significant host intervention with a transceiver, and may not be amenable to efficient and simple firmware implementations to allow usage within the transceiver for a variety of functions. The BERT and pattern generator systems may be very slow and may take hours to acquire an image of an eye diagram.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced.